Abstract: This paper proposes an open-loop residue amplifier (RA) based on a super source follower (SSF) structure, designed for 14-bit high-speed pipelined-SAR (PSAR) analog-to-digital converters ...
Abstract: Clock duty cycle is important in high-speed interface designs, as it directly impacts the transmitted data eye width, thereby increasing the deterministic jitter (DJ) of overall high-speed ...
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